Mixing of `timescale(s) causes problems if you are trying to pass delays as realtime types. The realtime type was never meant to be treated this way. realtime is actually a standard real type but with only local knowledge of the meaning of the units of time. When you pass a realtime value into a class in a different package all you get is that real type value and no units.
I used to work with a guy who would quite often correct me on my use of the word deprecate in the context of software. I would say "I think that software function is deprecated and should not be used anymore." (Deprecated pronounced dep-re-kate-ed). He would respond "no, that software function is depreciated". (Depreciated pronounced de-pre-she-ate-ed).
We have the two words:
Just one letter different, but the pronunciation is quite a bit different. I kept saying the word my way and he would say it his. His reasoning was that deprecate was a synonym for defecate; which is incorrect.
What is the correct word to use in the context of software? Read the rest of the post for the full answer.
Most tools in EDA (Electronic Design Automation) have an interactive TCL (Tool Command Language) interface. Some examples are Mentor Questa, Cadence Incisive, Cadence RTL Compiler, and many of the IBM EDA tools. A common problem is that the TCL language does not come shipped with a command line parser. TCL assumes you will just use positional arguments or you will come up with your own parsing package.
The Standard TCL Library (TCLLIB) has many routine libraries; including a very useful command line parser. Unfortunately, it is not always installed by default or included with the EDA implementation of TCL. For a good intro into the use of the command line parsing library available from TCLLIB, you should check out a post from Hai's Blog on how to use the TCLLIB cmdline library.
I took the the example from Hai's Blog and wrapped it to make it work in a reusable way within EDA tools and show some examples below of its use below. Since EDA tools already have the TCL interpreter running you would want to have the TCL arguments be wrapped around procedures and not the arguments to program itself.
I had used other programming languages before working with System Verilog. So when I started looking at System Verilog code for the first time, I was perplexed why there were all of these `includes all over - even in purely object oriented verification logic.
There is a problem and proposed solution I would like to share. Using packages instead of `include to store constants. I wrote the example both ways: package and `include; so you can see something that I see typically done with `include done with packages.
I was trying to get a metric for the performance penalty of simulating with and without a model parameter. The parameter was believed to be responsible for a performance difference of 10% to 15%, but after looking at the data more I became intrigued. Since no one had really deep dived into this and shown more than a few data points on performance it was time to get serious about simulation performance comparisons.
I started a project working on interfacing with the Future Technology Devices International Ltd. (FTDI) USB FT2232H Mini Module via their D2XX device driver. This device hooks up to a computer through a standard USB port and has a series of pins that can be used to interface with JTAG, I2C, and whatever serial like protocol you want. I had been using the Application Note AN_135 FTDI MPSSE Basics provided by the manufacturer and noticed that their Example Program (Chapter 5), which is very good, was not available for download, but only printed in pieces in their Application Note. As I went through the Application Note, I was writing out the example along with their comments and had a few minor corrections to get it working in a Linux environment.
I am making my transcription of the Example Program and corrections available on GitHub below.
Your FlexLM License server might be behind a firewall that makes it unaccessible even if you are VPNed into that network. The FlexLM server could be only listening to machines on a certain subnet of addresses or have some other reason to communicate with only certain machines. That firewall makes things like my post Installing Mentor Questa on Ubuntu much more difficult to complete if you wanted to run something like Mentor Questa on your remote machine.
This is my recipe that will allow you to do the necessary ssh forwarding to be able to communicate with a FlexLM server as if you were at a machine on its native network.
I use Mentor Questa a lot and when I am at work the visual lag of interacting with the GUI is almost imperceptible. But, when I am working remotely that visual lag is, of course, more noticeable. One possible solution that reduces the lag considerably compared to VNC, NX, or Windows Remote Desktop is to run Questa natively on your local computer.
The first problem you will run into is that Questa is only officially supported on Redhat and SUSE Linux. (It is also supported on Microsoft Windows too, but who really does serious engineering work on Windows?) So, if Questa is only supported on two commercial Linux variants are we stuck on installing Redhat at home from the corporate install? Fortunately, no.
You can install Mentor Questa on Ubuntu Linux. I'll go through installing it on Ubuntu 12.04.3 64bit.
I hadn't used Emacs to compile and parse errors for Mentor Questa before and decided to see what that would be like. Making Emacs understand how the simulator works and spits out errors involves extending Emacs to know how to launch your Verilog simulator and how to interpret the console messages. The built in Emacs compilation mode is not terrible and at least gives a starting point for compiling and debugging standard languages and custom ones. This is how to do it with Mentor Questa.
In the previous blog post, we were merging covergroups and, in all cases, keeping track of the covergroup instances "INST" (the Mentor Questa notation) data as well. This is perfectly fine if you have only a few repeated instances. But, what if you have thousands of instances in your design - the covergroup data can get bloated.